International Conference

• [57]
  Hyungju Noh, Dongseok Oh, Changmin Chae, Jangsaeng Kim, Sihyun Kim, and Sangwan Kim, “Memory characteristics of vertical channel-all-around gate-injection ferroelectric field-effect transistor (VCAA GI-FeFET),” International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Seoul, Korea, pp. -, Jul. 7-10, 2025.
• [56]
  Jehyeok Jung, Changyoung Song, Kihoon Kim, Sangwan Kim, and Sihyun Kim, “Impact of Process Variations on Sensing Margin in 1T-1C FeRAM,” International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Seoul, Korea, pp. -, Jul. 7-10, 2025.
• [55]
  Seongju Cho, Heebum Kang, Sangwan Kim, and Sihyun Kim, “Simulation Study on Geometric Variation and Structural Optimization in Channel-All-Around Ferroelectric Field-Effect Transistors,” International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Seoul, Korea, pp. -, Jul. 7-10, 2025.
• [54]
  Jinhong Lee, Sunwoo Lee, Jangsaeng Kim, Sihyun Kim, and Sangwan Kim, “Study of FeTFET-based TCAM search operation with different channel materials,” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Nara, Japan, pp. -, Jul. 3-4, 2025.
• [53]
  Dongseok Oh, Hyungju Noh, Changmin Chae, Jangsaeng Kim, Sihyun Kim, and Sangwan Kim, “Impact of ferroelectric properties on the memory characteristics of gate-injection ferroelectric field-effect transistor (GI-FeFET),” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Nara, Japan, pp. -, Jul. 3-4, 2025.
• [52]
  Minseok Kim, Seungmin Kang, Seonggeun Kim, Heebum Kang, Jiwon Han, Jangsaeng Kim, Sangwan Kim, and Sihyun Kim, “Back-End-of-Line Compatible Metal-Ferroelectric-Insulator-Silicon Capacitor with Al2O3 Insulator: Ferroelectricity Enhancement by ZrO2 Seed Layer,” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Nara, Japan, pp. -, Jul. 3-4, 2025.
• [51]
  Changyoung Song, Jehyeok Jung, Kihoon Kim, Sangwan Kim and Sihyun Kim, “Impact of electrode work function variation on sensing margin in 1T-1C FeRAM,” International Conference on Electronics, Information and Communication (ICEIC), Osaka, Japan, pp. 872-873, Jan. 19-22, 2025.
• [50]
  Jongho Shin, Jinsung Lee, Seongju Cho, Jiwon Han, Sangwan Kim and Sihyun Kim, “Analysis of self heating effect in advanced gate-all-around structure,” International Conference on Electronics, Information and Communication (ICEIC), Osaka, Japan, p. 879, Jan. 19-22, 2025.
• [49]
  Sanghyeok Seo, Jeonghwan Kim, Seungmin Kang, Sangwan Kim and Sihyun Kim, “BEOL compatible Hf0.5Zr0.5O2 film using ZrO2 seed layer,” International Conference on Electronics, Information and Communication (ICEIC), Osaka, Japan, pp. 877-878, Jan. 19-22, 2025.
• [48]
  Jiwon Han, Hyunho Ahn, Dongseok Kwon, Sangwan Kim and Sihyun Kim, “Nanowire JLFET-integrated ternary-CMOS for optimized static noise margin operation,” International Conference on Electronics, Information and Communication (ICEIC), Osaka, Japan, pp. 740-741, Jan. 19-22, 2025.
• [47]
  Hyeok Jun You, Kihoon Kim, Dongseok Kwon, Sangwan Kim and Sihyun Kim, “Optimization of array bias scheme for 1T-nC FeRAM,” International Conference on Electronics, Information and Communication (ICEIC), Osaka, Japan, pp. 742-743, Jan. 19-22, 2025.
• [46]
  Jinhwan Jung, Seonggeun Kim, Sihyun Kim and Sangwan Kim, “A novel ferroelectric field-effect transistor (FeFET) for a reliable multi-bit operation,” International Conference on Electronics, Information and Communication (ICEIC), Osaka, Japan, pp. 744-745, Jan. 19-22, 2025.

• [45]
  Dong Keun Lee, Hyunho Ahn, Sihyun Kim, and Sangwan Kim, “Dual-channel MOSFET-based ternary-CMOS inverter,” International Conference on Electronic Materials and Nanotechnology for Green Environment (ENGE), Jeju, Korea, Nov. 26, 2024.
• [44]
  Yelim Jeon, Hyungju Noh, Sihyun Kim, and Sangwan Kim, “Impact of work function variation in gate-injection flash (GI Flash),” International SoC Design Conference (ISOCC), Sapporo, Japan, pp. 38, Aug. 19-22, 2024.
• [43]
  Seungmin Kang, Sangwan Kim, and Sihyun Kim, “Write bias scheme optimization of ferroelectric field-effect-transistor (FeFET) synapse for accurate on-chip training ,” International SoC Design Conference (ISOCC), Sapporo, Japan, pp. 38, Aug. 19-22, 2024.
• [42]
  Kihoon Kim, Hyeokjun You, Sangwan Kim, and Sihyun Kim, “A highly integrable 3D n-capacitor-stacked ferroelectric RAM,” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Gangneung, Korea, pp. 73-74, Jul. 7-10, 2024.
• [41]
  Heebum Kang, Seungmin Kang, Sangwan Kim, and Sihyun Kim, “Vertical ferroelectric-metal field-effect-transistor analog synapse device for low power deep neural network training,” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Gangneung, Korea, pp. 180-181, Jul. 7-10, 2024.
• [40]
  Jaewon Jang, Shinhee Kim, Hyungju Noh, Sihyun Kim, and Sangwan Kim, “Analysis of hump characteristics induced by band-to-band tunneling in floating-body n-MOSFET with ultra-shallow source/drain junction depth,” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Gangneung, Korea, pp. 197-198, Jul. 7-10, 2024.
• [39]
  Hyungju Noh, Yelim Jeon, Sihyun Kim, and Sangwan Kim, “Investigation of the memory characteristics in the gate-injection ferroelectric metal/oxide/semiconductor (MOS) capacitors,” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Gangneung, Korea, pp. 84-85, Jul. 7-10, 2024.
• [38]
  Hyunho Ahn, Jang Hyun Kim, Sihyun Kim, and Sangwan Kim, “CMOS comparable ternary inverter with high operation stability,” Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Gangneung, Korea, pp. 184-186, Jul. 7-10, 2024.
• [37]
  Jaekyun Son, Jae Yeon Park, Tae-Hyeon Kim, Sihyun Kim and Sangwan Kim, “Investigation on electron back tunneling effect in charge trap flash memory with SiO2-Si3N4 (ON) gate dielectric,” International Conference on Electronics, Information and Communication (ICEIC), Taipei, Taiwan, pp. 420-422, Jan. 28-31, 2024.
• [36]
  Heebum Kang, Seungwon Go, Seungmin Kang, Kihoon Kim, Jiwon Han, Tae-Hyeon Kim, Sangwan Kim and Sihyun Kim, “Vertical-ferroelectric-metal field-effect transistor(V-FeMFET) for low-power non-volatile memory,” International Conference on Electronics, Information and Communication (ICEIC), Taipei, Taiwan, pp. 416-419, Jan. 28-31, 2024.

• [35]
  Taegun Kim, Dong Keun Lee, Sihyun Kim, and Sangwan Kim, “A simulation study about the memory operation of 3D-stacked capacitor-less 1T DRAM cells based on ferroelectric field-effect transistors (FeFETs),” International SoC Design Conference (ISOCC), Jeju, Korea, pp. 135-136, Oct. 25-28, 2023.
• [34]
  Sihyun Kim, "Ferroelectric Devices as Next Generation Low-Power Logic Technology," Asia-Pacific Workshop on Advanced Semiconductor Devices (AWAD), Yokohama, Japan, Jul. 10-11. 2023. [Invited]
• [33]
  Sihyun Kim, "Ferroelectric Devices as Next Generation Low-Power Logic Technology: NCFETs," China Semiconductor Technology International Conference (CSTIC), Shanghai, China, Jun. 26-27. 2023. [Invited]

• [32]
  Dong-Oh Kim, Kitae Lee, Changha Kim, Sihyun Kim, Hyun-Min Kim, Daewoong Kwon, and Woo Young Choi, “Circular Ferroelectric Tunnel Junction for Endurance Improvement,” International Microprocesses and Nanotechnology Conference (MNC), p.10P-3-12, Nov. 2022.
• [31]
  Munhyeon Kim, Sihyun Kim, Kitae Lee, Hyun-Min Kim, Changha Kim, Dong-Oh Kim, Byung-Gook Park, and Daewoong Kwon, “Analysis on Endurance Characteristics of Ferroelectric Memory Device,” Internation Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jul. 2022.

• [30]
  Sihyun Kim, Kitae Lee, and Byung-Gook Park, “Study on Etch Slope in Fin and Source/Drain Etch Process of Vertically-Stacked Nanosheet Gate-All-Around MOSFET,” 2020 IEEE Silicon Nanoelectronics Workshop (SNW), pp. 99-100, 2020.
• [29]
  Kitae Lee, Sihyun Kim, and Byung-Gook Park, “Influence of Gate to Drain Underlap on Negative Differencial Resistance in Ferroelectric FET,” 2020 IEEE Silicon Nanoelectronics Workshop (SNW), pp. 95-96, 2020.
• [28]
  Soyoun Kim, Kitae Lee, Sihyun Kim, Munhyeon Kim, Junil Lee, Ryoongbin Lee, Sangwan Kim, and Byung-Gook Park, “Comparative Study on Device Performance for the Shape of Tapered FinFETs and Gate-All-Around FETs in Sub- 7 nm CMOS Technology,” International Conference on Electronics, Information, and Communication (ICEIC), pp. 137-140, 2020.

• [27]
  Ryoongbin Lee, Junil Lee, Sangwan Kim, Kitae Lee, Sihyun Kim, Soyoun Kim, Yunho Choi, and Byung-Gook Park, “Ge Condensation Process for High ON/OFF Ratio of SiGe Gate-All-Around Nanowire Tunnel Field-Effect Transistor,” 2019 Silicon Nanoelectronics Workshop (SNW), pp. 1-2, 2019.
• [26]
  Soyoun Kim, Sihyun Kim, Kitae Lee, Munhyeon Kim, Suhyeon Kim, Sangwan Kim, and Byung-Gook Park, “Accurate Effective Width Extraction Methods for Sub-10nm Multi-Gate MOSFETs through Capacitance Measurement,” 2019 Electron Devices Technology and Manufacturing Conference (EDTM), pp. 115-117, 2019.
• [25]
  Munhyeon Kim, Kitae Lee, Sihyun Kim, Soyoun Kim, Sangwan Kim, and Byung-Gook Park, “Novel Stacked Floating Fin Structure Gate-All-Around Field-Effect Transistor for Design and Power Optimization,” 2019 Electron Devices Technology and Manufacturing Conference (EDTM), pp. 136-138, 2019.
• [24]
  Kitae Lee, Junil Lee, Sihyun Kim, Soyoun Kim, Munhyeon Kim, Sangwan Kim, and Byung-Gook Park, “Analysis on Fully Depleted Negative Capacitance Field-Effect Transistor (NCFET) Based on Electrostatic Potential Difference,” 2019 Electron Devices Technology and Manufacturing Conference (EDTM), pp. 422-424, 2019.

• [23]
  Sihyun Kim, Kitae Lee, Munhyeon Kim, Soyoun Kim, Suhyeon Kim, Sangwan Kim, and Byung-Gook Park, “Channel Thickness and Interfacial Trap Variation Induced by Selective-Channel-Etching in Stacked Gate-All-Around MOSFET shaving Multi-Channel-Width,” 31th International Microprocesses and Nanotechnology Conference (IMNC), 2018.
• [22]
  Soyoun Kim, Sihyun Kim, Kitae Lee, Munhyeon Kim, Suhyeon Kim, Junil Lee, Ryoongbin Lee, Sangwan Kim, Y. Yasuda-Masuoka, and Byung-Gook Park, “Ultra-low Leakage Technology for sub 10nm FinFET and GAAFET by Optimized Anti Punch-through Implantation,” 31th International Microprocesses and Nanotechnology Conference (IMNC), 2018.
• [21]
  Ryoongbin Lee, Junil Lee, Sangwan Kim, Sihyun Kim, Euyhwan Park, and Byung-Gook Park, “Variation Effect of Ge Concentration in SiGe Channel of Vertically stacked Tunnel Field-effect Transistor (TFET),” 2018 International Techninal Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 82-85, 2018.
• [20]
  Junil Lee, Ryoongbin Lee, Euyhwan Park, Sihyun Kim, Hyun-Min Kim, Kitae Lee, Soyoun Kim, Sangwan Kim, Jong-Ho Lee, and Byung-Gook Park, “Drive Current Boosting Method of Fin-structure Tunnel Field-effect Transistor with Locally Concentrated Silicon-Germanium Channel,” 2018 IEEE Silicon Nanoelectronics Workshop (SNW), pp. 107-108, 2018.
• [19]
  Ryoongbin Lee, Suhyeon Kim, Sangwan Kim, Sihyun Kim, Junil Lee, Euyhwan Park, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, “Simulation Study on Influence of Interface Trap Positon in Si1-xGex Gate-All-Around (GAA) Field-Effect Transistor,” International Conference on Electronics, Information, and Communication (ICEIC), 2018.
• [18]
  Euyhwan Park, Junil Lee, Sihyun Kim, Ryoongbin Lee, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, “Analysis of back-bias effect of multi-channel nanowire Tunnel Field-Effect Transistors (TFETs),” International Conference on Electronics, Information, and Communication (ICEIC), 2018.

• [17]
  Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, “Simulation study on temprature dependence of MOSFET and TFET-based pH-sensitive ISFET,” 2017 Silicon Nanoelectronics Workshop (SNW), pp. 93-94, 2017.
• [16]
  Hyungjin Kim, Min-Woo Kwon, Myung-Hyun Baek, Sungmin Hwang, Sihyun Kim, Taejin jang, Jeong-Jun Lee, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, “Gated-thyristor DRAM cell with pillar channel structure,” 2017 Silicon Nanoelectronics Workshop (SNW), pp. 71-72, 2017.

• [15]
  Sihyun Kim, Dae Woong Kwon, Euyhwan Park, Junil Lee, Ryoongbin Lee, Jong-Ho Lee, and Byung-Gook Park, “Investigation of Silicide-Induced Dopant Activation for Steep Tunnel Junction in Tunneling Field Effect Transistor (TFET),” 29th International Microprocesses and Nanotechnology Conference (IMNC), 2016.
• [14]
  Dae Woong Kwon, Euyhwan Park, Junil Lee, Ryoongbin Lee, Sihyun Kim, Hyun Min Kim, and Byung-Gook Park, “Capacitor-less DRAM cell using thyristor vertically fabricated with polycrystalline silicon,” 29th International Microprocesses and Nanotechnology Conference (IMNC), 2016.
• [13]
  Ryoongbin Lee, Dae Woong Kwon, Junil Lee, Euyhwan Park, Sihyun Kim, and Byung-Gook Park, “Demonstration of Reconfigurable Field Effect Transistor (RFET) for 3D Stacked TFET Application,” 29th International Microprocesses and Nanotechnology Conference (IMNC), 2016.
• [12]
  Euyhwan Park, Dae Woong Kwon, Junil Lee, Sihyun Kim, Ryoongbin Lee, Jong-Ho Lee, and Byung-Gook Park, “Back-gate effect on multi-channel nanowire Tunnel Field-Effect Transistors (TFETs) for Modulating Turn-on point,” 29th International Microprocesses and Nanotechnology Conference (IMNC), 2016.
• [11]
  Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, “Analysis of Dissimilarities in Current Drift on n-channel and p-channel pH-sensitive SiNW ISFET,” the 16th International Meeting on Chemical Sensors (IMCS), 2016.
• [10]
  Ryoongbin Lee, Dae Woong Kwon, Sihyun Kim, Dae Hwan Kim, and Byung-Gook Park, “Nanowire size dependency of silicon nanowire field-effect transistor based pH sensor,” The 16th International Meeting on Chemical Sensors (IMCS), 2016.
• [09]
  Dae Woong Kwon, Sihyun Kim, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, “Circuit Modeling of Ion Sensitive Field Effect Transistors with Current Drift,” The 16th International Meeting on Chemical Sensors (IMCS), 2016.
• [08]
  Sihyun Kim, Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, Taehyung Park, Ryoongbin Lee, Byung-Gook Park, “MOSFET-TFET Hybrid NAND/NOR Configuration for Improved AC Switching Performance,” 2016 IEEE Silicon Nanoelectronics Workshop (SNW), pp. 114-115, 2016.
• [07]
  Jang Hyun Kim, Hee Sauk Jhon, Dae Woong Kwon, Sihyun Kim, Byung-Gook Park, “A Through Silicon Via for suppressing self-heating effect in tunnel field effect transistor,” 2016 IEEE Silicon Nanoelectronics Workshop (SNW), pp. 112-113, 2016.

• [06]
  Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, “Investigation of Drift Effect on Silicon Nanowire Field Effect Transistor based pH Sensor,” International Microprocesses and Nanotechnology Conference (IMNC), 2015.
• [05]
  Junil Lee, Hyun Woo Kim, Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, TaeHyung Park, Sihyun Kim, Ryoongbin Lee, Jong-Ho Lee, and Byung-Gook Park, “Analysis on temperature dependent current mechanism of tunneling field-effect transistors,” International Microprocesses and Nanotechnology Conference (IMNC), 2015.
• [04]
  Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, TaeHyung Park, Ryoongbin Lee, Sihyun Kim, and Byung-Gook Park, “Drain doping dependence on switching characteristics of tunnel field-effect transistor (TFET) inverters,” International Microprocesses and Nanotechnology Conference (IMNC), 2015.
• [03]
  Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, TaeHyung Park, Ryoongbin Lee, Sihyun Kim, and Byung-Gook Park, “Effects of pillar thickness on DC/AC characteristics of tunnel field-effect transistor (TFET) with vertical structures,” International Microprocesses and Nanotechnology Conference (IMNC), 2015.
• [02]
  Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, TaeHyung Park, Ryoongbin Lee, Sihyun Kim, and Byung-Gook Park, “Reduction method of gate-to-drain capacitance by oxide spacer formation in tunnel field-effect transistor (TFET) with raised drain,” International Microprocesses and Nanotechnology Conference (IMNC), 2015.
• [01]
  Ryoongbin Lee, Dae Woong Kwon, Sihyun Kim, Dae Hwan Kim, and Byung-Gook Park, “Investigation of sensor performance in tunneling field effect transistor (TFET) as highly sensitive and multi-sensing biosensors,” International Microprocesses and Nanotechnology Conference (IMNC), 2015.